parent
33f73cac60
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054e3aefd5
2 changed files with 115 additions and 1 deletions
@ -0,0 +1,111 @@ |
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commit 6eb5a49a1f55325accb46b51e775857a3ea6ec57
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Author: William Roberts <william.c.roberts@intel.com>
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Date: Thu Mar 19 19:10:50 2020 -0500
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Esys_TestParams: silence expected errors
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The TestParams code is used to test paramters against the TPM to
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understand if a specific algorithm and scheme is supported. Thus,
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certain errors are expected. The expected errors are:
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1. From any layer
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2. Are Format 1 errors
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3. Are P1 or Parameter 1 errors
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4 are one of:
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- RC_CURVE
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- RC_VALUE
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- RC_ASSYMETRIC
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- RC_KEY_SIZE
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Fixes: #1573
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Signed-off-by: William Roberts <william.c.roberts@intel.com>
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diff --git a/src/tss2-esys/api/Esys_TestParms.c b/src/tss2-esys/api/Esys_TestParms.c
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index e64521e9..9b5bffa8 100644
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--- a/src/tss2-esys/api/Esys_TestParms.c
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+++ b/src/tss2-esys/api/Esys_TestParms.c
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@@ -92,9 +92,11 @@ Esys_TestParms(
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/* Restore the timeout value to the original value */
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esysContext->timeout = timeouttmp;
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- return_if_error(r, "Esys Finish");
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+ if (!tss2_is_expected_error(r)) {
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+ return_if_error(r, "Esys Finish");
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+ }
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- return TSS2_RC_SUCCESS;
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+ return r;
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}
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/** Asynchronous function for TPM2_TestParms
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@@ -266,7 +268,9 @@ Esys_TestParms_Finish(
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}
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/* The following is the "regular error" handling. */
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if (iesys_tpm_error(r)) {
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- LOG_WARNING("Received TPM Error");
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+ if (!tss2_is_expected_error(r)) {
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+ LOG_WARNING("Received TPM Error");
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+ }
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esysContext->state = _ESYS_STATE_INIT;
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return r;
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} else if (r != TSS2_RC_SUCCESS) {
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diff --git a/src/util/aux_util.h b/src/util/aux_util.h
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index 3f9eb841..35deca87 100644
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--- a/src/util/aux_util.h
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+++ b/src/util/aux_util.h
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@@ -6,6 +6,9 @@
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#ifndef AUX_UTIL_H
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#define AUX_UTIL_H
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+#include <stdbool.h>
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+
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+#include "tss2_tpm2_types.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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@@ -84,6 +87,45 @@ extern "C" {
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r_max = r; \
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}
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+static inline TSS2_RC
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+tss2_fmt_p1_error_to_rc(UINT16 err)
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+{
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+ return TPM2_RC_1+TPM2_RC_P+err;
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+}
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+
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+static inline bool
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+tss2_is_expected_error(TSS2_RC rc)
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+{
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+ /* Success is always expected */
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+ if (rc == TSS2_RC_SUCCESS) {
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+ return true;
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+ }
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+
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+ /*
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+ * drop the layer, any part of the TSS stack can gripe about this error
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+ * if it wants too.
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+ */
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+ rc &= ~TSS2_RC_LAYER_MASK;
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+
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+ /*
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+ * Format 1, parameter 1 errors plus the below RC's
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+ * contain everything we care about:
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+ * - TPM2_RC_CURVE
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+ * - TPM2_RC_HASH
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+ * - TPM2_RC_ASYMMETRIC
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+ * - TPM2_RC_KEY_SIZE
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+ */
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+ if (rc == tss2_fmt_p1_error_to_rc(TPM2_RC_CURVE)
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+ || rc == tss2_fmt_p1_error_to_rc(TPM2_RC_VALUE)
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+ || rc == tss2_fmt_p1_error_to_rc(TPM2_RC_HASH)
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+ || rc == tss2_fmt_p1_error_to_rc(TPM2_RC_ASYMMETRIC)
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+ || rc == tss2_fmt_p1_error_to_rc(TPM2_RC_KEY_SIZE)) {
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+ return true;
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+ }
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+
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+ return false;
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+}
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+
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#ifdef __cplusplus
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} /* extern "C" */
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#endif
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